xspi does not support TWI
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Description
This feature request is based on this thread. The high-level SPI drivers doesn't supports TWI (aka. half-duplex SPI) mode (where the MOSI and the MISO is common.)
The write on TWI is the same as on SPI. (because the MISO is unused).
The only difference comes up during read operation, when the SDIO (the common data buffer) should be tri-stated.
The QSPI core doesn't support TWI, therefore, external FPGA logic controls the tri-state pi always. Because of the external logic I suggest function pointer(s) in solution, to handle the tri-state control in all cases.
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with the high-level SPI drivers and the Xilinx AXI Quad SPI documentation linked in the issue, focusing on read operations and the externally controlled tri-state behavior. Done means TWI (half-duplex SPI) reads are supported while existing SPI writes continue to work, with the external tri-state control accommodated.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 30/100