Can't use repeated start for write-then-read with iicps

I was trying to use the iicps driver to communicate with a chip that requires a write (internal address setup), repeated start, then a read transaction in order to read data.

I found that using XIicPs_MasterSend() always resulted in an explicit STOP and START condition between the write and read transactions (see protocol analyzer trace). I found AR#61665 which says there is a hardware issue in generating interrupts if you do a READ, repeated start, READ process.

It looks like the code linked below was added to XIicPs_MasterSend(), but based on comments should have been added to XIicPs_MasterRecv() in order to deal with AR#61665. Indeed, if I move that block from XIicPs_MasterSend() to the end of XIicPs_MasterRecv() I'm able to generate a repeated start condition after write transactions, and I get expected interrupts at the end of both the write and read transactions (see second protocol analyzer trace).

https://github.com/Xilinx/embeddedsw.github.io/blob/d1a863466203fde812b52fedaf9bcb590b0fbf76/iicps/src/xiicps_master.c#L146

Original Trace (red is stop condition, green is start condition):

Fixed Trace (red is stop, green is start/re-start):

Start in xiicps/src/xiicps_master.c at the linked block in XIicPs_MasterSend(), then compare it with XIicPs_MasterRecv() and the AR#61665 behavior described in the issue. Reproduce a write-then-read transaction with the iicps driver and verify that the trace shows a repeated start, with expected interrupts completing both transactions.