Xilinx / Xilinx/Vitis-Tutorials
AIE/07-firFilter_AIEvsHLS: Diagram of Assigning Multiple AI Engines per Filter implies the reversed result
Open
Nobody has claimed this yet.
- Dominant language
- C
- Stars
- 1.6k
- Forks
- 627
- PR merge metrics
- No merged PRs in 30d
Description
This diagram implies the more you cascade, the higher throughput per cascade length because the slope is steeper. However, according to the numbers, the more you cascade, throughput per cascade is lower. Starting the Y axis from 0 would provide more accurate meaning.
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Assessment
This issue has not been assessed yet.