Vector35 / Vector35/binaryninja-api
Vector/SIMD registers mixed with general purpose registers in MLIL and HLIL?
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Description
Version and Platform:
- Binary Ninja Version: 5.4.9926-dev
- Edition: Commercial
- OS: macOS
- OS Version: 26.5
- CPU Architecture: M5 Max
Bug Description:
Looks like Vector/SIMD registers are somehow mixed on arm64 in the MLIL/HLIL view. The MLIL and HLIL shows that a movi v0 is writing to x0 register returned from a previous function call.
Expected Behavior:
Create a separate temporary variable with the 0xaa assignment, or even simplify it by not showing the initial assignment, showing only the subsequent stp q0, q0, [dest] and display the final destinations as being assigned with 0xaa
Binary:
Cannot provide it, but this behavior should happen in many macOS system binaries.
Additional Information:
Feel free to change issue title to something more meaningful/accurate as I'm just trying to guess what is going on...
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reproducing the MLIL/HLIL output on arm64 macOS system binaries, focusing on a movi v0 after a function call returning in x0 and the subsequent stp q0, q0, [dest]. Compare the displayed SIMD and general-purpose register assignments; done means they remain separate or the final destinations correctly show the 0xaa value.
Written by the indexing model from the issue text.
Assessment
- Domain
- reverse-engineering
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 38/100