Support Signed Lifted IL Shift Amounts in Custom Architectures

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Assessment

Difficulty
5/5
Estimated time
Over a week
Newbie friendliness
25/100
Issue type
Feature
Clarity
Mostly clear
Activity status
Stale
Tech stack
cpp
Domain
compilers, reverse-engineering

Research direction

Start by examining the existing Lifted IL arithmetic and logical shift operations and the custom-architecture lifting paths described in the issue. Determine whether signed shift amounts should use new operations or changed argument semantics, then document the chosen behavior and verify it for negative amounts and opposite-direction shifts.

Written by the indexing model from the issue text.

Description

Component: API Component: Architecture Core: LLIL Effort: Low Impact: Medium Lifting

What is the feature you'd like to have?
Support negative/signed shift amounts in arithmetic and logical shifts. At present, an IL arithmetic shift right with a shift amount of 0xFFFFFFFF on a 32-bit architecture results in an attempted shift of val >> 4294967295, resulting in a value filled with whatever the upper-most bit was. I would like to see either additional Lifted IL operations that accept a signed shift amount, or to have the existing Lifted IL operations interpret the shift amount argument as a signed value, with corresponding documented semantics.

Is your feature request related to a problem?
Hexagon provides arithmetic and logical shift operations for both left- and right- shifts that take a shift amount from a register. The architecture defines the semantics for a negative shift amount as a shift of the same type (arithmetic or logical) in the opposite direction. This is presently somewhat tricky to lift, and would introduce additional conditionals into the IL flow for every shift operation of this type.

Dominant language
C++
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Forks
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Avg merge
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Merged PRs (30d)
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