Vector35 / Vector35/binaryninja-api
Improve HLIL for signed non-negative compare
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Description
Discussed in https://github.com/Vector35/binaryninja-api/discussions/2892
Originally posted by gixslayer January 28, 2022
Tested on version 3.0.3233. I have a simple piece of x86_64 code that essentially performs the following:
int32_t value;
// code that assigns to and uses value
return value >= 0;
This greater or equal to zero check is implemented as:
; load value into eax
not eax
shr eax, 0x1f
; return
So effectively it just isolates the sign bit and checks that.
This is correctly shown in the disassembly and BNIL, but the HLIL also shows this in a very verbose manner:
rax_25 = (not.d(value) u>> 0x1f).b
It would be nice if the HLIL would display it as something similar to value s>= 0. Not sure if this is just an edge case, but it feels common enough to warrant some QoL readability improvements for HLIL.
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Research direction
The issue names HLIL and BNIL but no source files or tests; begin by locating the HLIL logic that represents signed non-negative comparisons and the related regression tests. The work is done when the shown sign-bit sequence is rendered as an equivalent signed non-negative comparison without degrading the existing disassembly or BNIL output.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- cpp
- Domain
- compilers, reverse-engineering
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 35/100