The-OpenROAD-Project / The-OpenROAD-Project/OpenROAD-flow-scripts
Generated .lib for hardened block lists VDD/VSS as signal inputs
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@dsengupta0628 is already working on this.
Since Jul 18, 2026.
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Description
Subject
[Stage]: Other. Please describe below.
Describe the bug
In final_report_aes-block_asap7_base_2026-07-16_18-29.tar.gz downloaded from
https://jenkins.openroad.tools/job/OpenROAD-flow-scripts-Public/job/master/1493/artifact/
if I inspect results/asap7/aes-block_aes_rcon/base/aes_rcon_typ.lib, I see VDD/VSS listed as signal inputs
pin("VDD") {
direction : input;
capacitance : 0.0000;
}
pin("VSS") {
direction : input;
capacitance : 0.0000;
}
Expected Behavior
VDD/VSS listed as supply pins
Environment
N/A
To Reproduce
See the above CI job
Relevant log output
Screenshots
No response
Additional Context
No response
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