Add indentation to tracelogs

FCEUX and latest Gens have this, and it's super useful for quickly determining subroutines (and skipping over them as needed). A core can determine indentation based on stack size, and pass the number to the tracer, which would then pad each line by that size.

Example code for gpgx (to show how it'd look):

protected override void TraceFromCallback(uint addr, uint value, uint flags)
{
	var regs = DebuggableCore.GetCpuFlagsAndRegisters();
	uint pc = (uint)regs["M68K PC"].Value & 0xFFFFFF;
	var disasm = Disassembler.Disassemble(MemoryDomains.SystemBus, pc, out _);

	var stackBase = MemoryDomains.SystemBus.PeekUint(0, true);
	var stackPointer = regs["M68K A7"].Value;
	var stackSize = (int)((stackBase - stackPointer) / 4) & 63;

	var sb = new StringBuilder();

	foreach (var r in regs)
	{
		if (r.Key.StartsWith("M68K")) // drop Z80 regs until it has its own debugger/tracer
		{
			if (r.Key != "M68K SP" && r.Key != "M68K ISP" && // copies of a7
				r.Key != "M68K PC" && // already present in every line start
				r.Key != "M68K IR") // copy of last opcode, already shown in raw bytes
			{
				sb.Append($"{r.Key.Replace("M68K", "").Trim()}:{r.Value.Value.ToHexString(r.Value.BitSize / 4)} ");
			}
		}
	}

	var sr = regs["M68K SR"].Value;
	sb.Append(string.Concat(
		(sr & 16) > 0 ? "X" : "x",
		(sr &  8) > 0 ? "N" : "n",
		(sr &  4) > 0 ? "Z" : "z",
		(sr &  2) > 0 ? "V" : "v",
		(sr &  1) > 0 ? "C" : "c"));

	this.Put(new(disassembly: $"{new string(' ', stackSize)}{pc:X6}:  {disasm}".PadRight(50+stackSize), registerInfo: sb.ToString().Trim()));
}

Start by locating the core trace callbacks and the tracer output path, using the mentioned TraceFromCallback entry point and the gpgx example as references. Check how stack depth can be passed from cores to the tracer, then verify that trace lines are padded consistently according to that depth across the affected cores.