SpinalHDL / SpinalHDL/SpinalHDL

SpinalSim: onSamplings can't work properly with clock from a blackbox

Open
#1,334 8 comments 0 reactions 0 assignees View on GitHub

Nobody has claimed this yet.

Dominant language
Scala
Stars
2k
Forks
391
Avg merge
1d 22h
Merged PRs (30d)
5

Description

Spinal version: v1.10.1
Simulation tool: Synopsys VCS 2018

Here's the simulation code:

        SimTimeout(500 ms)
        val perpPort = dut.socInst.logicMainInst.coreInst.io.d_perp
        val coreCd = ClockDomain(dut.socInst.logicMainInst.smuInst.io.coreClkRst.clk)
        InitBase.doInit(dut, 10 MHz, "00".asBin)
        infoMonitor(perpPort, coreCd)
        var numCnt = 0
        coreCd.onSamplings{
            if(perpPort.aw.valid.toBoolean && perpPort.aw.addr.toBigInt == 0x30006040L){
                val data = (perpPort.w.data.toBigInt & 0x000000FF).toChar
                println("state of ready: " + perpPort.aw.ready.toBoolean + " , count = " + numCnt + " , char is " + data)
                numCnt = 0
            }else{
                numCnt += 1
            }
        }
        sleep(100 ms)
        simSuccess()

All the signals here are set with "simPublic".

I want to record the cycles between two transport, but it gives me such a callback:

state of ready: true , count = 3125 , char is S
state of ready: true , count = 8 , char is M
state of ready: false , count = 6 , char is U
state of ready: false , count = 6 , char is  
state of ready: true , count = 14 , char is n
state of ready: false , count = 6 , char is i
state of ready: false , count = 6 , char is t
state of ready: true , count = 14 , char is S
state of ready: false , count = 6 , char is u
state of ready: false , count = 6 , char is c
state of ready: true , count = 14 , char is e
state of ready: false , count = 6 , char is s
state of ready: false , count = 6 , char is s

And the wave is:

image

Well, it's extremely unexpected... The number of count is obviously wrong, and the char "I" is missing.

The only special is the clock is from a simulation model of an RC osc.

So is there anything wrong about this? Maybe I need to offer a simplified model?

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by reducing the provided SpinalSim example around ClockDomain.onSamplings, the blackbox-derived clock, and the simPublic signals, then reproduce it with Synopsys VCS 2018. Compare callback counts and captured characters with the waveform; done means the behavior is explained and the issue has a reproducible fix or documented limitation.

Written by the indexing model from the issue text.

Assessment

Tech stack
scala
Domain
testing-qa
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.