RT-Thread / RT-Thread/rt-thread

[Feature] riscv: common64: ASID 的初始化过程优化 | Merge asid init into setup of early page table

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Arch: RISC-V
Dominant language
C
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Description

Describe problem solved by the proposed feature

关联 https://github.com/RT-Thread/rt-thread/pull/9511#discussion_r1796327187

https://github.com/RT-Thread/rt-thread/blob/906d1caea6f82dcb45dc1925842e89b76c01bbfd/libcpu/risc-v/common64/asid.c#L30-L51

这里的 write_csr(satp, satp_reg); 重置 satp 怪怪的。因为正常是两个启动阶段,做两次 satp 设置。第一次是初始映射,使用大粒度 pte,为了给初始化过程配置最基础的虚存属性(比如 cache 属性),并进入线性地址空间。第二次是按照虚存配置的映射(可能从静态/动态配置中读取运行时虚存布局),按照应用、驱动的需求配置内核地址空间。

这里在中间又重置了一次 satp,并不是特别必要。或许是可以把 ASID 初始化操作合并到 rt_hw_mem_setup_early (第一次的初始映射)中。

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Research direction

Read libcpu/risc-v/common64/asid.c lines 30-51 and the linked discussion in pull request 9511, then trace rt_hw_mem_setup_early to understand the first page-table setup. The change is complete when ASID initialization is integrated into that early setup without the unnecessary intermediate satp reset, while preserving both startup mapping stages.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
operating-systems
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
42/100

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