[FEA] Investigate memory usage, thread usage, and memory transfers in NN Descent
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- Dominant language
- Cuda
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Description
Currently, NN Descent uses a lot of pinned host memory and device memory. As a consequence, it's not very scalable. Also, there are a lot of memory transfers and copies to create the final indices and distances. We should investigate and try to optimize memory-related usage where possible.
Another orthogonal issue is that NN Descent implementation relies on launching OMP threads to build the index. This can cause starvation issue when an application is attempting to build multiple indexes in different host threads. Ideally, we would attempt to refactor and use the GPU to achieve parallelism in lieu of OMP threads.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reading the NN Descent implementation and tracing how it allocates pinned host memory, device memory, and creates final indices and distances. Profile the memory transfers and copies, then inspect how OMP threads are launched during index construction. Done means the identified memory and thread-scalability issues have measurable improvements.
Written by the indexing model from the issue text.
Assessment
- Domain
- performance, search
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100