[BUG] cvt int8/uint8 -> bfloat16 emits a sm_90-only instruction on Ampere/Ada instead of the software fallback (arch gate too loose)

Which component has the problem?

CuTe DSL

Bug Report

Describe the bug

cvt_i8_bf16_intrinsic.supported_archs lists Ampere (*Arch.AmpereArchs()) and Ada (*Arch.AdaArchs()), but it lowers to cvt.rn.bf16.s8, which the PTX ISA requires sm_90 or higher. So on a pre-Hopper target, int8/uint8 → bf16 emits an instruction ptxas rejects, instead of taking the else: cutlass_arith.itofp software fallback the dispatch already has (the too-broad allow-list makes the arch in supported_archs check pass, so the fallback is never reached).

Steps/Code to reproduce bug

import cutlass
import cutlass.cute as cute

@cute.jit
def convert(src: cute.Tensor, dst: cute.Tensor):
    dst.store(src.load().to(cutlass.BFloat16))   # Int8 -> BFloat16

# compile for Ampere/Ada, e.g. CUTE_DSL_ARCH=sm_80

The lowered module contains cvt.rn.bf16.s8, which ptxas rejects on sm_80/86/87/89.

Expected behavior

Drop *Arch.AmpereArchs() / *Arch.AdaArchs() from cvt_i8_bf16_intrinsic.supported_archs so pre-sm_90 targets fall through to the existing itofp fallback — matching the sibling cvt_i4_bf16_intrinsic, which correctly restricts itself.

Environment details (please complete the following information):

• nvidia-cutlass-dsl (also on main @ e8ecfad75b44d1ad56264f5001d877e9e47fe080). Affects Int8/Uint8 → BFloat16 on sm_80/86/87/89; Hopper/Blackwell unaffected.

Start in python/CuTeDSL/cutlass/cute/arch/numeric_conversion.py at cvt_i8_bf16_intrinsic.supported_archs, and compare it with cvt_i4_bf16_intrinsic. Check the related lowering in arch/nvvm_wrappers.py and dispatch in cute/tensor.py, then reproduce for sm_80, sm_86, sm_87, or sm_89. Done means pre-sm_90 targets use the existing itofp fallback while Hopper and newer targets retain the intrinsic.