[FEA] Specify L2 cache eviction in TMA copy
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- C++
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Description
Which component requires the feature?
CuTe DSL
Feature Request
I'd love to be able to control L2 cache eviction when doing TMA load and TMA store (e.g. evict_first, evict_last)
Additional context
This is important for some attention kernels, as we used it in FA3, e.g. here:
https://github.com/Dao-AILab/flash-attention/blob/413d07e9deef1e3c793c7de59d7146b43ae4d558/hopper/mainloop_fwd_sm90_tma_gmma_ws.hpp#L753
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with the CuTe DSL implementation of TMA load and store operations, using the linked FA3 hopper/mainloop_fwd_sm90_tma_gmma_ws.hpp example as context for evict_first and evict_last. Done means callers can specify L2 cache eviction behavior for TMA copy operations and the supported modes are covered by relevant tests.
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Assessment
- Tech stack
- cpp
- Domain
- performance
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 45/100