[DOC] CUTLASS INT4 GEMM: Missing SM89 Dispatch Configuration for L40S/4090

Hello! I'm trying to run an s4t s4n s32t GEMM on an L40S/4090 using CUTLASS, and I know that its compute capability is SM89. However, while reviewing the GEMM unit tests, I couldn’t find a dispatch configuration for s4t s4n s32t on SM89. The only dispatch configurations available for SM89 are:

• gemm_f8t_f8n_f16t_tensor_op_f16_sm89.cu
• gemm_f8t_f8n_f32t_tensor_op_f32_sm89.cu
• gemm_f8t_f8n_f32t_tensor_op_f32_sparse_sm89.cu
• gemm_f8t_f8n_f8t_tensor_op_f16_sm89.cu
• gemm_f8t_f8n_f8t_tensor_op_f32_sm89.cu
• gemm_f8t_f8n_f8t_tensor_op_f32_sparse_sm89.cu

I also tried using the s4t s4n s32t configuration for SM80 and simply changing the architecture from SM80 to SM89, but it failed to compile.

Does this mean that CUTLASS INT4 GEMM is not supported on SM89? Thank you! I’ve marked this as a documentation issue since I think that documentation on how to use the INT4 tensor core on the 4090 using CUTLASS would be greatly appreciated.

Start with the GEMM unit tests and the listed SM89 dispatch configuration files, then compare them with the SM80 s4t s4n s32t configuration. Reproduce the reported attempt to change SM80 to SM89 and determine whether INT4 GEMM is supported on L40S/4090. Done means documenting the supported configuration or clearly stating the limitation and usage guidance.