[QST] Epilogue Swizzle

What is your question?
I'm interested in extending Example 50: Hopper Gemm with Epilogue Swizzle to Ampere architectures and am trying to understand how swizzled SmemLayout avoids both bank conflicts and enables vectorized copies from shared to registers.

Specifically, as configured here, and implemented here, in the epilogue, the accumulators from the mainloop are copied to shared memory, which is laid out using an SmemLayout and then copied in (ideally) vectorized fashion to registers partitioned for performing the epilogue op and writing back out to global memory.

How does swizzling affect both bank conflict on writing from registers -> smem and then vectorized smem -> registers copy specifically during the epilogue? I get how swizzled layouts are necessary for bank-conflict free ldmatrix during the mainloop but am less clear the effect on copies in the epilogue where the results from mma.sync are first written back to shared memory and then copied back out to registers and eventually to global memory.

Start with examples/50_hopper_gemm_with_epilogue_swizzle/50_hopper_gemm_with_epilogue_swizzle.cu, especially the referenced configuration, then read include/cutlass/epilogue/collective/sm70_epilogue_vectorized.hpp. Trace the epilogue copies in the linked code and document how the swizzled layout affects bank conflicts and vectorized shared-memory transfers, including what would be needed for Ampere.