[FEA]: Capture potential segmented reduce transform API and performance

### Is this a duplicate?

- [x] I confirmed there appear to be no [duplicate issues](https://github.com/NVIDIA/cccl/issues) for this request and that I agree to the [Code of Conduct](CODE_OF_CONDUCT.md)

### Area

CUB

### Is your feature request related to a problem? Please describe.

One of the use cases for hierarchical parallelism is RMS Norm https://github.com/NVIDIA/cccl/issues/8358#issuecomment-4237875945. That said, we can provide much simpler interface for RMS Norm, something along the lines of `cub::DeviceSegmentedReduceTransform` that'd use hierarchical parallelism internally, but not necesserily expose it through the interface.

### Describe the solution you'd like

This issue can be closed by filing an issue or discussion that captures:
- segmented reduce API
- list of algorithms that can be implemented with it (RMS Norm, etc)
- performance of preliminary implementation compared to other solutions (PyTorch, cuTile, etc)

If sufficient number of use cases around this interface accumulate over time, we'll consider implementing it.

### Describe alternatives you've considered

_No response_

### Additional context

_No response_