[FEA]: [DeviceRadixSort] Potential optimizations from libcusort

### Is this a duplicate?

- [x] I confirmed there appear to be no [duplicate issues](https://github.com/NVIDIA/cccl/issues) for this request and that I agree to the [Code of Conduct](CODE_OF_CONDUCT.md)

### Area

CUB

### Is your feature request related to a problem? Please describe.

I've been working on https://github.com/IlyaGrebnov/libcusort, a radix sort tuned for RTX 5090. Sharing techniques that might be useful. Code is Apache 2.0 with extensive comments.

### Describe the solution you'd like

- Single memset with alternating status bits. Instead of separate descriptor arrays per radix pass (requiring 4+ memsets), use one unified array where the high bit of the status field toggles per pass. Stale COMPLETE from pass N-1 reads as INVALID for pass N. Eliminates multiple memset calls.
- Fused histogram + exclusive scan. The histogram kernel computes the exclusive prefix sum directly and writes to the descriptor array with lookback status encoding. No separate scan kernel needed.
- Histogram also writes prefixes at d_descriptors + (num_passes - 1 - pass) * RADIX_COUNT, so d_descriptors[-1] naturally serves as the terminating tile prefix for onesweep lookback. No special first-tile handling needed.
- Programmatic Dependent Launch (sm_90+). Histogram signals completion early via cudaTriggerProgrammaticLaunchCompletion(), allowing the first onesweep pass to start while histogram finishes its writes.
- Register packing for 8/16-bit keys. Pack multiple small keys into 32-bit registers (4×int8 or 2×int16 per register). Reduces register pressure, improves occupancy, enables SIMD-style processing.

### Describe alternatives you've considered

_No response_

### Additional context

_No response_