NVIDIA / NVIDIA/cccl

[FEA]: Acquire and Release semantics for cuda::atomic_thread_fence

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#6,279 0 comments 0 reactions 1 assignee Claimed by @wmaxey View on GitHub
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Description

### Is this a duplicate?

- [x] I confirmed there appear to be no [duplicate issues](https://github.com/NVIDIA/cccl/issues) for this request and that I agree to the [Code of Conduct](CODE_OF_CONDUCT.md)

### Area

libcu++

### Is your feature request related to a problem? Please describe.

As of PTX 8.6 we can issue acq/rel semantics separately. We should add them to the codegen and emit them rather than promote to acq_rel.

https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-membar

### Describe the solution you'd like

Modify codegen to emit acq/rel fences and support usage in `cuda/atomic`.

### Describe alternatives you've considered

_No response_

### Additional context

_No response_

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