NVIDIA / NVIDIA/cccl

[FEA]: Add a sub-warp/warp segmented-sort kernel using the runtime-width group merge primitive

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#10,947 7 comments 0 reactions 1 assignee Claimed by @kaatish View on GitHub
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Description

### Is this a duplicate?

- [x] I confirmed there appear to be no [duplicate issues](https://github.com/NVIDIA/cccl/issues) for this request and that I agree to the [Code of Conduct](CODE_OF_CONDUCT.md)

### Area

CUB

### Is your feature request related to a problem? Please describe.

Fine-grained segmented-sort planning can assign one thread, a sub-warp, or one warp to a segment. A kernel is needed to consume these work-plan configurations.

### Describe the solution you'd like

Add a sub-warp/warp segmented-sort kernel that:

- Consumes work-plan configurations using up to 32 threads per segment.
- Uses the runtime-width group merge-sort primitive tracked in #10944.
- Supports independent and partially filled groups.
- Provides correctness coverage.

This issue can be closed once the kernel is tested as a consumer of the sub-warp/warp work-plan tier.

### Describe alternatives you've considered

A separate sorting implementation for this tier is unnecessary because it shares the runtime-width primitive with the block-scale tiers.

### Additional context

Parent tracking issue: #10946.

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