[FEA]: Add a single-thread odd-even merge sort building block for segmented sort

### Is this a duplicate?

- [x] I confirmed there appear to be no [duplicate issues](https://github.com/NVIDIA/cccl/issues) for this request and that I agree to the [Code of Conduct](CODE_OF_CONDUCT.md)

### Area

CUB

### Is your feature request related to a problem? Please describe.

For sufficiently small segments, assigning a sub-warp, warp, or CTA to each segment can introduce more cooperation and synchronization overhead than the sorting itself requires.

A single CUDA thread can process one small segment locally. CUB does not currently provide this specialization as a reusable building block for `DeviceSegmentedSort`.

This is part of the roadmap for improving `DeviceSegmentedSort`: https://github.com/NVIDIA-dev/cccl_private/issues/829

### Describe the solution you'd like

The contribution should consider:

- A compile-time maximum capacity and runtime valid item count.
- Key-only and key-value pair sorting.
- Ascending and descending order.
- Interface suitable for integration from another kernel, particularly the segment-partitioning kernel.
- Validation of unsupported configurations.
- Correctness tests for supported and partially filled capacities.

This issue can be closed once the single-thread odd-even merge sort is integrated into `DeviceSegmentedSort` and merged into CUB.

### Describe alternatives you've considered

_No response_

### Additional context

_No response_

cc @colin-mcd