[Bug]: qwen3_5_weight_mapper rejects ModelOpt W4A16_AWQ checkpoints.
Nobody has claimed this yet.
- Dominant language
- Python
- Stars
- 14.7k
- Forks
- 2.8k
- Avg merge
- 2d 23h
- Merged PRs (30d)
- 489
Description
System Info
- GPU: NVIDIA RTX A6000
- GPU RAM: 48GB
tensorrt_llm == 1.3.0rc15(container:nvcr.io/nvidia/tensorrt-llm/release:1.3.0rc15)nvidia-modelopt == 0.45.0.dev114+g2b02ab9a1- Model:
Qwen/Qwen3.5-4B - Backend: PyTorch (
trtllm-serve serve ... --backend pytorch
Who can help?
No response
Information
- The official example scripts
- My own modified scripts
Tasks
- An officially supported task in the
examplesfolder (such as GLUE/SQuAD, ...) - My own task or dataset (give details below)
Reproduction
# 1. Quantize Qwen3.5-4B with ModelOpt
python3 Model-Optimizer/examples/llm_ptq/hf_ptq.py \
--pyt_ckpt_path /path/to/Qwen3.5-4B \
--qformat int4_awq \
--output_dir /path/to/qwen35-awq-ckpt \
--export_fmt hf \
--calib_size 512
# 2. Resulting hf_quant_config.json:
# {
# "producer": {"name": "modelopt", "version": "0.45.0.dev114"},
# "quantization": {
# "quant_algo": "W4A16_AWQ",
# "kv_cache_quant_algo": "FP8",
# "group_size": 128,
# "has_zero_point": false,
# "pre_quant_scale": true
# }
# }
# Try to Serve
trtllm-serve serve /path/to/qwen35-awq-ckpt \
--backend pytorch \
--host 0.0.0.0 --port 8080
Expected behavior
Server loads the checkpoint. TRT-LLM correctly identifies the format.
actual behavior
File "tensorrt_llm/_torch/models/checkpoints/hf/qwen3_5_weight_mapper.py",
line 160, in _split_qkv_scale_tensor
assert tensor.shape[0] == expected_total_blocks, (
AssertionError: Expected packed qkv scale tensor with leading dim 64,
got torch.Size([8192, 20])
additional notes
In qwen3_5_weight_mapper, _split_qkv_scale_tensor hardcodes a /128 block factor along the output dimension:
def _split_qkv_scale_tensor(
self, tensor: torch.Tensor, expected_q: int, expected_v: int
) -> tuple[torch.Tensor, ...]:
expected_q_blocks = math.ceil(expected_q / 128)
expected_v_blocks = math.ceil(expected_v / 128)
expected_total_blocks = expected_q_blocks * 2 + expected_v_blocks
assert tensor.shape[0] == expected_total_blocks, (
f"Expected packed qkv scale tensor with leading dim {expected_total_blocks}, "
f"got {tensor.shape}"
)
return torch.split(tensor, [expected_q_blocks, expected_q_blocks, expected_v_blocks], dim=0)
But standard AWQ stores per-output-channel scales:
- ModelOpt
W4A16_AWQwithgroup_size=128:(out_dim, in_dim/128)=(8192, 20)
In this case, the leading dim is the full output channel count (8192), not the block count (64).
I'm not sure whether this should be classified as a bug or whether TensorRT-LLM simply hasn't added int4_awq support for Qwen3.5 yet.
Before submitting a new issue...
- Make sure you already searched for relevant issues, and checked the documentation and examples for answers to frequently asked questions.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start in tensorrt_llm/_torch/models/checkpoints/hf/qwen3_5_weight_mapper.py, especially _split_qkv_scale_tensor, and reproduce the failure with the provided ModelOpt W4A16_AWQ Qwen3.5 checkpoint and PyTorch serving command. Compare the mapper's expected packed scale shape with the reported (8192, 20) tensor; done means the checkpoint loads successfully while existing supported formats remain correct.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- python, pytorch
- Domain
- backend, machine-learning
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 52/100