KhronosGroup / KhronosGroup/Vulkan-Docs
(Feature Request) Official Non-32-bit Bitwise Intrinsic Support
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Description
We would like to use some of SPIR-V’s bitfield intrinsics, namely OpBitfieldInsert, OpBitfieldUExtract, and OpBitfieldSExtract, OpBitReverse, and OpBitCount on a mix of integer widths (i8, i16, i32, and i64).
Historically, GLSL unofficially supported these operations through intrinsics in that language, but only 32-bit integers were guaranteed to work, and otherwise results were undefined. Still, many IHVs technically supported the non-32 bit variants, either in hardware or through some emulation in the driver.
However, with the current Vulkan spec, we now have the following restriction:
> VUID-StandaloneSpirv-Base-04781
The Base operand of any OpBitCount, OpBitReverse, OpBitFieldInsert, OpBitFieldSExtract, or OpBitFieldUExtract instruction must be a 32-bit integer scalar or a vector of 32-bit integers
This restriction is currently always the case, even if SpvCapabilityInt8 / SpvCapabilityInt16 / SpvCapabilityInt64 were requested, and even if a given device technically supports these instructions for non-32-bit integers.
Would it be possible to amend 04781 to allow IHVs that support these intrinsics at a hardware or driver level for non-32-bit types to “opt into” officially supporting these cases? Potentially through a physical device feature?
Contributor guide
Research direction
Start with VUID-StandaloneSpirv-Base-04781 and the Vulkan specification language quoted in the issue, then review how SpvCapabilityInt8, SpvCapabilityInt16, and SpvCapabilityInt64 are currently constrained. Done means the request for official non-32-bit intrinsic support has a resolved specification path and the applicable restriction or feature behavior is documented.
Written by the indexing model from the issue text.
Assessment
- Domain
- documentation
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Active
- Clarity
- Mostly clear
- Newbie friendliness
- 35/100