KhronosGroup / KhronosGroup/SPIRV-Registry

Does it make sense for builtins to have `Physical` addresses ?

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Description

The `Physical32` and `Physical64` addressing models assert a fixed-sized, canonical representation for all pointers, meant for use in OpenCL and related environments (i.e. LevelZero), but I'm not sure is this is meant to be the case for `Input` and particularly builtins.

Actually using them like so seems broken, see this bug in IGC for an example of what I mean: https://github.com/intel/intel-graphics-compiler/issues/347

If the `Input` storage class work the way I understand them to (compiler only accepts loads to global input variables and transforms them to an appropriate platform-specific intrinsic), then the spec should probably walk back the physical addressing wording to only include storage classes that actually describe physical memory.

cc @bashbaug

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Research direction

Start by reading this issue alongside the linked Intel Graphics Compiler issue #347, then inspect the relevant SPIR-V specification wording for Physical32, Physical64, and Input addressing models. Done means reaching a decision on whether builtins and Input belong under the physical-addressing wording and recording the agreed clarification in the specification.

Written by the indexing model from the issue text.

Assessment

Domain
compilers
Issue type
Documentation
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
25/100

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