KhronosGroup / KhronosGroup/OpenCL-Docs

left hand side vector component selection

Open
#581 2 comments 0 reactions 0 assignees View on GitHub
OpenCL C Spec
Dominant language
Python
Stars
420
Forks
131
Avg merge
5d 13h
Merged PRs (30d)
11

Description

We were recently surprised internally by "left-hand-side" vector component selection issue, and we also had a related CTS issue (https://github.com/KhronosGroup/OpenCL-CTS/issues/1120), so I think this is an area we need to clarify in the spec:

The question has to do with the meaning of left-hand-side component selection when applied to a vector in memory. Specifically, what should happen when a single vector component in memory is selected and written to?

See example: https://godbolt.org/z/Kjbhcc

```c
dst[0].z = 5;
```

One interpretation - that appears to be especially common among graphics people - is that this is a single-component write to memory.

Clang has a different interpretation, and seems to be treating this as a vector read, followed by a vector modification (insertion), followed by a vector write:

```llvm
%2 = load <4 x i32>, <4 x i32> addrspace(1)* %0, align 16 ;; READ
%3 = insertelement <4 x i32> %2, i32 5, i64 2 ;; MODIFY
store <4 x i32> %3, <4 x i32> addrspace(1)* %0, align 16 ;; WRITE
```

In most cases, the two different interpretations are functionally identical (there certainly could be a performance difference!), but in other cases the second interpretation can lead to unintended race conditions:

```c
// Imagine that one work-item taking the "if" branch executes concurrently
// with another work-item taking the "else" branch. If these are read-
// modify-write operations, this is a race condition:
if (some_condition) {
dst[0].x = 5;
} else {
dst[0].y = 6;
}
```

Which interpretation is correct? Is the code above a race condition? Can this be described more clearly in the spec? Thanks!

Contributor guide

Open the contributing guide

Research direction

Start with the linked OpenCL-CTS issue 1120 and the Compiler Explorer example, then locate the OpenCL C specification wording for left-hand-side vector component selection and memory writes. Done means the specification explicitly resolves whether the operation is a single-component write or a read-modify-write, including the race-condition example.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
documentation
Issue type
Documentation
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
28/100

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.