JuliaSIMD / JuliaSIMD/VectorizationBase.jl

Improve cpu info for non-x86 architectures

Open
#9 10 comments 1 reaction 0 assignees View on GitHub
Dominant language
Julia
Stars
72
Forks
34
PR merge metrics
No merged PRs in 30d

Description

Currently, it uses a [generic build script](https://github.com/chriselrod/VectorizationBase.jl/blob/d655cf967941911492f7203bc4edb5fa2f61aa2b/deps/build_generic.jl#L1).

This script assumes:
```julia
const REGISTER_SIZE = 16
const REGISTER_COUNT = 16
const CACHELINE_SIZE = 64
const SIMD_NATIVE_INTEGERS = true
```

If any of these are violated, dependent libraries (e.g., LoopVectorization) are likely to produce suboptimal code. If these numbers undershoot, that would just mean some performance is left on the table, but it's likely to perform reasonably well.
If these numbers overshoot, performance consequences could be dire. Register spills galore.

I believe some ARM CPUs do not have SIMD `Float64`, so perhaps this should be handled somehow.

Ideally, we'd use a library like [CpuId.jl](https://github.com/m-j-w/CpuId.jl) to query hardware info, like we do for AMD and Intel.

Contributor guide

No contributing guide indexed for this repository

Assessment

This issue has not been assessed yet.

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.