Ecdar / Ecdar/Ecdar-GUI

Convert diagonal clock constraints in simulation when possible

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#123 1 comment 0 reactions 0 assignees View on GitHub
simulation
Dominant language
Java
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3
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5
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No merged PRs in 30d

Description

Here is how clock constraints are shown in the simulation tool now (SW5):
![208062192-515749d9-1977-46d9-99a1-dab8a6a11f9c~2](https://user-images.githubusercontent.com/17483094/208094632-959975b5-68a9-4550-9079-95062dabf23c.png)
We can and should convert expression with cycles like this to `x=y=z`, to avoid as many diagonal constraints (`x-y<=c`) as possible because they are generally confusing.

We should also convert `0-x<=c` to `-c<=x` (if that is not already done)

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