Include predicated/masked-out loads/stores in drmemtraces

Today, drmemtraces include load/store records only for accesses that actually committed. Masked-out, predicated-out, or otherwise conditionally excluded loads and stores are *not* included.

This is a feature request to include these accesses, since some hardware might act on them (issue prefetches, etc.) before the mask/predicate is resolved.

These should not be regular read/write records: they would have to be a new marker or a new top-level record type. Most likely they should not return true for things like type_is_data() or type_is_read().

This requires changing instrumentation for:

+ Scatter/gather x86 expansion
+ Scatter/gather aarch64 expansion
+ Rep string 0-iteration loops
+ aarch32 predication
+ Other conditional operations like x86 cmov

This will add overhead in the instrumentation and in i/o for extra records.

It may be worth optimizing for some common cases: e.g., for contiguous scatter/gather, do not expand the unrolled loop instrumentation but instead store just the base address in one extra record and let raw2trace fill in the missing accesses as the full set of possible accesses is known statically.