Instruction cache coherence transparency

If an application on an explicitly-coherent-vs-data-cache architecture like AArch64 dynamically generates code into memory and fails to flush the icache, it will cause potential problems of stale values when that code is executed. However, under DR, there will never be a problem since DR will read the app's code as data and execute copies in its code caches which are correctly synchronized. This is a transparency violation as DR does not reproduce the app's original behavior.

This is likely not high priority and unless there is a simple solution we will probably just live with it. Xref related issues like NX transparency (#329) though that is easily solvable.

No source file, test, or entry point is named. Start by reading this issue and the linked NX transparency issue (#329), then investigate DynamoRIO's handling of dynamically generated code on explicitly coherent AArch64 systems. Done means establishing whether DR can preserve the application's stale-icache behavior or documenting why it cannot.

Written by the indexing model from the issue text.