VSIB handling is wrong

The decoder relies on the EVEX prefix bits to choose ymm/zmm for the VSIB index rather than the REQUIRES_VSIB_YMM/ZMM flags. Consider `62 92 fd 41 c6 4c 39 20`. DR will decode this with a ZMM register rather than the correct YMM register.

Start by tracing the decoder's VSIB handling and the REQUIRES_VSIB_YMM/REQUIRES_VSIB_ZMM flags. Reproduce decoding of `62 92 fd 41 c6 4c 39 20` and compare the selected index register width with the expected YMM result; the issue is done when DR no longer selects ZMM for this instruction.

Written by the indexing model from the issue text.