AArch64 decoder/encoder improvements

The current method of generating decode/encode functions based on the `codec.txt` bitmap format has limitations in terms of:
- Flexibility when specifying instruction aliases and variants, e.g. `DC` and `IC` based on `SYS`, and `PRFM`. See #4388 and discussion at https://github.com/DynamoRIO/dynamorio/pull/4386#discussion_r462356954.
- Extensibility when new versions of the ISA are released, e.g. SVE.
- More automation in order to generate as much decode/encode logic as possible from an ISA spec, including multiple operand creation from a single bitfield.

The proposal is to use the publicly available XML specifications to replace `codec.txt` as the source from which to generate decode/encode functionality. Useful links:
https://alastairreid.github.io/ARM-v8a-xml-release/
https://developer.arm.com/architectures/instruction-sets/base-isas/a64
https://github.com/alastairreid/mra_tools