AArch64 asm operand width warnings with recent clang

I'm seeing asm operand width warnings with a recent clang (https://github.com/llvm/llvm-project/commit/2e499eee5884456f3dd068662ee1785f24bd88cc, from 2 weeks ago), though this may reproduce with older clangs: I don't have simple access to them, and on Travis we're using gcc.

They look like this:
```
core/unix/os.c:1724:5: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
READ_TLS_SLOT_IMM(TLS_SELF_OFFSET, os_tls);
^
core/unix/os.c:1504:40: note: expanded from macro 'READ_TLS_SLOT_IMM'
: "r"(_base_offs), "i"(imm) \
^
core/unix/os.c:1724:5: note: use constraint modifier "w"
core/unix/os.c:1501:51: note: expanded from macro 'READ_TLS_SLOT_IMM'
__asm__ __volatile__("mov " ASM_R2 ", %1 \n\t" READ_TP_TO_R3_DISP_IN_R2 \
^
core/unix/os.c:1824:5: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
READ_TLS_SLOT(tls_offs, val);
^
core/unix/os.c:1526:40: note: expanded from macro 'READ_TLS_SLOT'
: "r"(_base_offs), "r"(offs) \
^
core/unix/os.c:1824:5: note: use constraint modifier "w"
core/unix/os.c:1522:51: note: expanded from macro 'READ_TLS_SLOT'
__asm__ __volatile__("mov " ASM_R2 ", %1 \n\t" READ_TP_TO_R3_DISP_IN_R2 \
^
core/unix/os.c:1824:19: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
READ_TLS_SLOT(tls_offs, val);
^
core/unix/os.c:1824:5: note: use constraint modifier "w"
READ_TLS_SLOT(tls_offs, val);
^
core/unix/os.c:1523:63: note: expanded from macro 'READ_TLS_SLOT'
"add " ASM_R3 ", " ASM_R3 ", %2 \n\t" \
^
core/unix/os.c:1831:5: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
WRITE_TLS_SLOT(tls_offs, value);
^
core/unix/os.c:1516:40: note: expanded from macro 'WRITE_TLS_SLOT'
: "r"(_base_offs), "r"(var), "r"(offs) \
^
core/unix/os.c:1831:5: note: use constraint modifier "w"
core/unix/os.c:1512:51: note: expanded from macro 'WRITE_TLS_SLOT'
__asm__ __volatile__("mov " ASM_R2 ", %0 \n\t" READ_TP_TO_R3_DISP_IN_R2 \

...
```

I'm passing -Wno-asm-operand-widths for now.