tracing tools should not include loads/stores skipped due to x86 conditional execution or synch primitives

Today drmemtrace inside drcachesim predicates its data trace instrumentation for app loads and stores that are predicated on ARM, but it does not do so for x86 for instructions like OP_cmovcc and OP_bs{r,f}. This issue covers addressing that in drmemtrace, as well as in the sample tracing clients.

Other x86 "predicated" loads/stores will be more complex to handle: OP_getsec, OP_xend, OP_vpmaskmov{d,q}, OP_vpmaskmovp{s,d}, OP_{,v}maskmovdqu.

We can ignore OP_fmovcc as it does not touch memory.