DynamoRIO / DynamoRIO/dynamorio
ARM's OP_vext: how represent varying partial src access?
Open
Component-API
OpSys-ARM
Priority-Low
Type-Feature
- Dominant language
- C
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Description
How to represent which parts of simd regs it accesses? How much of each of the
2 srcs it reads from varies by the immed passed in: so can't easily say
OPSZ_2_of_8 or sthg.
For now, bailing: listing whole reg.
Could later provide extra-info decode routine?
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