improve ARM IBL mode switch performance

Today we have a single set of Thumb gencode including the IBL. For the mode switch we check the LSB, write the result into dcontext->isa_mode, and clear the LSB for the hashtable lookup. We probably want to at least avoid the store via a load-and-cmp which at least on recent x86 processors is faster than a store. We may also want to consider 2 sets of gencode, Thumb and ARM, which would avoid any store on non-mode-changes. We could also consider a different approach to mode changes that moves the focus back to dispatch().