DynamoRIO / DynamoRIO/dynamorio
match assembly operand labels and order in INSTR_CREATE_ macros for ARM
- Dominant language
- C
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Description
_From [bruen...@google.com](https://code.google.com/u/109494838902877177630/) on November 17, 2014 17:42:25_
The first batch of INSTR_CREATE_ macros for ARM are going to differ from assembly in at least the following ways:
- Dsts are always first, while ARM asm has memory dsts later in the order
- The macros are using Rd for load dsts where asm uses Rt
- The macros are using Vn for single source operands for easy doxygen generation where asm uses Vm
- The macros are using Vd and Rd for OP_vmov and OP_vdup dsts where asm uses Vm and Rt
- The macros are using Vt and Vm for the srcs of OP_vcmp where asm uses Vd and Vm
Basically, the asm conventions have violations and exceptions that make them hard to program toward.
_Original issue: http://code.google.com/p/dynamorio/issues/detail?id=1563_
Contributor guide
Research direction
Start by locating the ARM INSTR_CREATE_ macros and reviewing the operand conventions listed in the issue. Compare their labels and ordering with ARM assembly, including memory destinations and the OP_vmov, OP_vdup, and OP_vcmp exceptions. Done means the macro operands consistently match the intended assembly conventions.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- c
- Domain
- devtools
- Issue type
- Refactor
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 35/100