support Intel Safer Mode Extensions CPL0 behavior

_From [bruen...@google.com](https://code.google.com/u/109494838902877177630/) on November 06, 2013 12:31:01_

For now I'm only adding ISA support for CPL>0 effects of OP_getsec.
This issue covers handling the others, for supporting CPL 0.

/\* XXX i#: various getsec leaf funcs at CPL 0 write to all kinds of processor state
- including eflags and eip. Leaf funcs are indicated by eax value, though.
- Here we only model the CPL > 0 effects, which conditionally write to ebx + ecx,
- modeled as read + write (ebx is a real input too).
_/
/_ XXX i#: if we support CPL0 in the future we'll need to dynamically
\* handle the leaf functions here, which can change eip and other
\* state.
*/

_Original issue: http://code.google.com/p/dynamorio/issues/detail?id=1313_