Optimize xxh32 and xxh64 with ARM SVE instructions
- Dominant language
- C
- Stars
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- Avg merge
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- Merged PRs (30d)
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Description
With pull request #713 , XXH3 is optimized by ARM SVE instructions. Since data is divided in blocks in XXH3, and vector instructions could handle data in parallel.
For XXH32 & XXH64, data is fetched with stream. So a new method (multi-buffer) could be used to adopt vector instructions. The implementation is in https://github.com/hzhuang1/isa-l_crypto/tree/debug_xxh32. Multi-buffer also means multiple jobs. With multiple jobs running in parallel, vector instructions could be used to accelerate.
The performance data fetched from two machines is above. One is SVE512 (fujitsu), and the other is SVE256 (AWS).
Contributor guide
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Research direction
Start by reviewing pull request #713 for the existing ARM SVE optimization approach and the linked isa-l_crypto debug_xxh32 implementation. Adapt the multi-buffer approach to XXH32 and XXH64, then compare performance on SVE256 and SVE512 systems against the reported results.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- c
- Domain
- performance
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 25/100