Primitive Data Handling (Arm32)
Open
enhancement
help wanted
- Dominant language
- C++
- Stars
- 5
- Forks
- 0
- PR merge metrics
- No merged PRs in 30d
Description
There are a few aspects to this task:
* [Register names need to change from 64-bit to 32-bit](https://github.com/CodeusTech/Xita-AArch64/blob/PreAlpha-Dev/src/xcs/regstack/codes.h#L102)
* It is particularly important that memory addresses be constrained to 32-bit register size
* Xita control registers for AArch64 are general-purpose registers in 64-bit mode, but they are control registers in 32-bit mode.
* New registers need to be marked off as control registers for Xita. 3-4 registers are sufficient for runtime operation.
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