Removing box from DWD changes port order

The [`rem_box!`](https://github.com/AlgebraicJulia/Catlab.jl/blob/master/src/wiring_diagrams/Directed.jl#L457) function for DWDs can change the order of ports of other boxes.
This is likely because the DWD depends on the relative order of the Port parts to determine the order of box ports, but the [`rem_parts!`](https://github.com/AlgebraicJulia/Catlab.jl/blob/master/src/categorical_algebra/ACSetInterface.jl#L194) often does not preserve this order. A minimal example which demonstrates this is given below:
```julia
using Catlab
using Catlab.WiringDiagrams

A, B, C = [:A], [:B], [:C]
f = Box(:f, A, B)
g = Box(:g, [A,B], C)

d = WiringDiagram([A, B], [C,B])
fv = add_box!(d, f)
gv = add_box!(d, g)

add_wire!(d, (input_id(d),1) => (fv,1))
add_wire!(d, (fv,1) => (output_id(d),2))
add_wire!(d, (input_id(d),1) => (gv,1))
add_wire!(d, (input_id(d),2) => (gv,2))
add_wire!(d, (gv,1) => (output_id(d),1))

@show input_ports(d, 2)
rem_box!(d, 1)
@show input_ports(d, 1)
```
On my computer, this outputs:

```julia
input_ports(d, 2) = Any[[:A], [:B]]
input_ports(d, 1) = Any[[:B], [:A]]
```