ARMmbed / ARMmbed/mbed-drivers

Clarify memory model for transaction queues

Open
#9 2 comments 0 reactions 0 assignees View on GitHub
enhancement
Dominant language
C++
Stars
39
Forks
41
PR merge metrics
No merged PRs in 30d

Description

This is related to pull request #5: there is now a SPI module class which has a transaction queue object. The transaction queue is fixed in size for each instance of the peripheral; currently, there are 16 transactions in the queue for each SPI instance. This seems rather arbitrary and wasteful in terms of RAM. Variants:
1. keep the transaction queue fixed in size, but make the maximum size global per peripheral type, not per peripheral instance (for example: maximum 32 transactions for all SPI instances). Not ideal.
2. make the transaction queue dynamic (new transactions are malloc'd)
3. combine 1 and 2 by starting with a fixed size and growing it only if needed

In the context of this issue, it might be worth investigating if it's worth using some C++ std classes (vector, array ...).

Contributor guide

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Research direction

Start with the SPI module class and its transaction queue object described in the issue, then inspect how the fixed 16-transaction capacity is allocated for each peripheral instance. Compare the fixed, dynamically allocated, and hybrid alternatives, including the suggested C++ standard-library types. Done means the queue memory model and preferred approach are agreed and implemented.

Written by the indexing model from the issue text.

Assessment

Tech stack
cpp
Domain
embedded-iot
Issue type
Refactor
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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